1. 2-V to 5.5-V VCC Operation
2. Max tpd of 11 ns at 5 V
3. Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
4. Typical VOHV (Output VOH Undershoot)>2.3 V at VCC = 3.3 V, TA = 25°C
5. Support Mixed-Mode Voltage Operation on All Ports
6. Schmitt-Trigger Circuitry on A, B, and CLR Inputs for Slow Input Transition
Rates
7. Edge Triggered From Active-High or Active-Low Gated Logic Inputs
8. Ioff Supports Partial-Power-Down Mode Operation
9. Retriggerable for Very Long Output Pulses, up to 100% Duty Cycle
10. Overriding Clear Terminates Output Pulse
11. Glitch-Free Power-Up Reset on Outputs
12. Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
13. ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
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